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[VHDL-FPGA-Verilog] VGAps2final_change

Description: 用VHDL写的一个小游戏，能够支持视频显示，对初学者有些帮助吧-Use VHDL to write a small game, able to support video display, some for beginners to help you
Platform: | Size: 620544 | Author: 陈帅 | Hits:

[Graph program] VGA_TV

Description: 一个模拟视频输入转VGA视频输出的Verilog程序-An analog video input to VGA video output of the Verilog program
Platform: | Size: 26624 | Author: 李华 | Hits:

[VHDL-FPGA-Verilog] vga_core(vhdl)

Description: vga视频输出（vhdl），主要是从sdram中产生图形，输出到vga中-vga video outputs [vhdl], mainly arising from the SDRAM graphics, output to vga Medium
Platform: | Size: 459776 | Author: 程荣 | Hits:

[VHDL-FPGA-Verilog] DE2_70_TV

Description: --- --- --- -Verilog--- --- ---- This design converts DVD video into a format suitable for display on a CRT/LCD monitor. A DVD video source, such as a DVD player, should be connected to the VIDEO IN port on the DE2-70 board. A CRT/LCD monitor should be connected to the VGA port. The DVD video should be displayed on the monitor. Initially, the video may be shifted vertically press KEY0 to force the design to resynchronize.--------------------Verilog---------------- This design converts DVD video into a format suitable for display on a CRT/LCD monitor. A DVD video source, such as a DVD player, should be connected to the VIDEO IN port on the DE2-70 board. A CRT/LCD monitor should be connected to the VGA port. The DVD video should be displayed on the monitor. Initially, the video may be shifted vertically press KEY0 to force the design to resynchronize.
Platform: | Size: 168960 | Author: Sami | Hits:

[VHDL-FPGA-Verilog] vga2

Description: VHDL code for UP2 board of Altera, that generate a video signal to VGA port.
Platform: | Size: 332800 | Author: Lokous | Hits:

[VHDL-FPGA-Verilog] 61EDA_C878

Description: fpga tv转vga 解码器adv7180，视频转换adv7123-fpga tv to vga，decoder adv7180，video converter adv7123
Platform: | Size: 2042880 | Author: james | Hits:

[VHDL-FPGA-Verilog] ourdev_247126

Description: his design converts DVD video into a format suitable for display on a CRT/LCD monitor. A DVD video source, such as a DVD player, should be connected to the VIDEO IN port on the DE2-70 board. A CRT/LCD monitor should be connected to the VGA port. The DVD video should be displayed on the monitor. Initially, the video may be shifted vertically press KEY0 to force the design to resynchronize. Running the Design-his design converts DVD video into a format suitable for display on a CRT/LCD monitor. A DVD video source, such as a DVD player, should be connected to the VIDEO IN port on the DE2-70 board. A CRT/LCD monitor should be connected to the VGA port. The DVD video should be displayed on the monitor. Initially, the video may be shifted vertically press KEY0 to force the design to resynchronize. Running the Design
Platform: | Size: 161792 | Author: 路啄米 | Hits:

[VHDL-FPGA-Verilog] VGA

Description: 压缩包中包含了用Verilog编写的视频控制模块，实现PAL制式到VGA制式的实时转换，同时包含了VGA专用ram配置模块，可直接实用-Compressed package includes the preparation of the video with the Verilog control module, PAL format to achieve real-time conversion to standard VGA, VGA also includes dedicated ram configuration module can be directly useful
Platform: | Size: 79872 | Author: 熊文 | Hits:

[VHDL-FPGA-Verilog] POTS.tar

Description: Pivoting Object Tracking System - This project implements an object recognition system, where a camera tracks the position of an object. The camera is mounted on an iRobot Create two-wheeled robot, which rotates according to the control signal generated by our object tracking algorithm. Meanwhile, it displays 320200 color video on a VGA display.We use a simple object recognition algorithm based on color information of the image coming from the camera. In our tests, the system is able track objects of single colors such as white, red, orange or blue if there is sufficient contrast between the object and background.
Platform: | Size: 10240 | Author: Dang Tien Dat | Hits:

[VHDL-FPGA-Verilog] fpga-vga

Description: 本设计介绍了一种利用可编程器件FPGA，应用VHDL和Verilog两种语言实现VGA（video graphic array）图像控制器的设计方案，通过采用FPGA（Filed programmable Gate Array）芯片设计和VGA接口将要显示的数据直接送到显示器主要设计出一些重要图像的各个功能模块，并且通过系统仿真软件和FPGA硬件实验板来验证设计结果的正确性。 本设计首先对FPGA芯片和图像的显示原理以及VGA显示器的控制方法做了清晰的阐述，然后在此基础上使用FPGA设计VGA图像的显示控制的各种方案，实现彩条、中文汉字、图形、汉字动画等图像在显示器上的显示，完成各种各样图像的变化，达到设计的基本要求。 -This design has introduced a kind of make use of the programmable device FPGA, the application of the two languages and Verilog VHDL realize VGA (video graphic array) image controller design scheme, by the use of the FPGA (Filed programmable Gate array) chip design and VGA interface that is to be revealed data directly to the main display design out some important image of each function module, and through the system simulation software and hardware board to verify the FPGA design of the accuracy of the results. The design of FPGA chips, and the first image display principle and VGA display control methods of clear paper, and then based on this use of the image and the FPGA design VGA display control solutions, realize the striped, Chinese characters, graphics, animation, and other Chinese characters on a display image display, finish all kinds of image changes, to design the basic demand.
Platform: | Size: 5575680 | Author: 郭晓阳 | Hits:

[VHDL-FPGA-Verilog] VGA_VHDL

Description: VGA 视频 VHDL 原代码, 当然你需要FPGA板去调试改变. 仅仅看作好的原始参考-VGA video VHDL source code, of course, you need to FPGA board to debug changed. Merely as good the original reference
Platform: | Size: 1024 | Author: Scott Reed | Hits:

[Other Games] Pingpong

Description: A Altera DE-2 ping pong game which using a PS/2 keyboard to control.VGA port of DE-2 will be the output of the game video.The sources code build from VHDL code on Quartus II.-A Altera DE-2 ping pong game which using a PS/2 keyboard to control.VGA port of DE-2 will be the output of the game video.The sources code build from VHDL code on Quartus II.
Platform: | Size: 18709504 | Author: kkddaa | Hits:

[VHDL-FPGA-Verilog] vga

Description: vga This details a VGA controller component that handles VGA signal timing, written in VHDL for use with CPLDs and FPGAs. Figure 1 illustrates a typical example of the VGA controller integrated into a system. As shown, the VGA controller requires a pixel clock at the frequency of the VGA mode being implemented. It then derives all of the signal timing necessary to control the interface. It outputs the current pixel coordinates to allow an image source to provide the appropriate pixel values to the video DAC, which in turn drives the VGA monitor’s analog inputs. It also provides the sync signals for the VGA monitor. This component was designed using Quartus II, version 12.1. Resource requirements depend on the implementation.-This details a VGA controller component that handles VGA signal timing, written in VHDL for use with CPLDs and FPGAs. Figure 1 illustrates a typical example of the VGA controller integrated into a system. As shown, the VGA controller requires a pixel clock at the frequency of the VGA mode being implemented. It then derives all of the signal timing necessary to control the interface. It outputs the current pixel coordinates to allow an image source to provide the appropriate pixel values to the video DAC, which in turn drives the VGA monitor’s analog inputs. It also provides the sync signals for the VGA monitor. This component was designed using Quartus II, version 12.1. Resource requirements depend on the implementation.
Platform: | Size: 219136 | Author: jiang nan | Hits:

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